Hello again! This is a continuation of my posts about fixing the Coverity issues in coreboot. This week’s plan was to tackle the 28 issues in northbridge/intel, which turned out to be much easier than I expected, since I’m already done! With that out of the way, I’m going to begin working on northbridge/via and southbridge. For the curious, here is the project timeline for entire summer.

Week	Components	Issues
May 6 to 10	util	22
May 13 to 17	util, payloads	22
May 20 to 24	arch, drivers	20
May 27 to 31	commonlib, cpu, lib, mainboard	22
June 3 to 7	northbridge/amd	21
June 10 to 14	northbridge/intel	28
June 17 to 21	northbridge/via, southbridge	22
June 24 to 28	soc/intel	21
July 1 to 5	soc/rockchip, soc/nvidia	20
July 15 to 19	soc/misc, vendorcode/cavium	26
July 22 to 26	vendorcode/amd	21
July 29 to Aug 2	vendorcode/amd	21
Aug 5 to 9	vendorcode/amd	20
Aug 12 to 16	vendorcode/amd	20
Aug 19 to 23	vendorcode/amd	20

As you can see, there are a lot of issues in the AMD vendorcode. This consists primarily of AGESA, AMD’s framework for initialization of their 64 bit platforms (somewhat similar to Intel’s FSP). This code is somewhat … dense (someone on IRC described it as a “sea of abstraction”), so I made sure to leave plenty of time for it. As always, you can keep up to date on my current progress on Gerrit.

PS: As an extra bonus, here is a picture of my new BeagleBone Black!

I recently got a ThinkPad T500 to practice installing coreboot on, and I needed some sort of external programmer to flash the SOIC. There are many options available (flashrom has a whole list here), but a single-board computer like this is one of the closest you can get to “plug-and-play.” There are many other popular boards (notably the Raspberry Pi), but the BBB doesn’t require any binary blobs to boot, and is open source hardware too. The only thing I’m waiting for now is an Atheros ath9k wireless card, which runs without any binary firmware. (Hey, if you’re gonna go freedom, you gotta go all the way.)